ISC'13

June 16-20, 2013

Leipzig, Germany

Presentation Details

 
Name: Offload Compiler Runtime for the Intel® Xeon Phi™ Coprocessor
 
Time: Thursday, June 20, 2013
10:00 AM - 10:30 AM
 
Room:   Hall 5
CCL - Congress Center Leipzig
 
Breaks:10:30 AM - 11:00 AM Coffee Break
 
Speakers:   Chris Newburn, Intel
 
Abstract:   The Intel® Xeon Phi™ coprocessor platform enables offload of computation from a host processor to a coprocessor that is a fully-functional Intel® Architecture CPU. This paper presents the C/C++ and Fortran compiler offload runtime for that coprocessor. The paper addresses why offload to a coprocessor is useful, how it is specified, and what the conditions for the profitability of offload are. It also serves as a guide to potential third-party developers of offload runtimes, such as a gcc-based offload compiler, ports of existing commercial offloading compilers to Intel® Xeon Phi™ coprocessor such as CAPS®, and third-party offload library vendors that Intel is working with, such as NAG® and MAGMA®. It describes the software architecture and design of the offload compiler runtime. It enumerates the key performance features for this heterogeneous computing stack, related to initialization, data movement and invocation. Finally, it evaluates the performance impact of those features for a set of directed micro-benchmarks and larger workloads.

Paper authors:
Chris J. Newburn1, Rajiv Deodhar1, Serguei Dmitriev1, Ravi Murty1, Ravi Narayanaswamy1, John Wiegert1, Francisco Chinchilla1, Russell McGuire1
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1Intel Corporation, USA
 
Program may be subject to changes.