June 16-20, 2013

Leipzig, Germany

Session Details

Name: Memory System Design
Time: Thursday, June 20, 2013
9:00 AM - 10:30 AM
Room:   Hall 2
CCL - Congress Center Leipzig
Breaks:10:30 AM - 11:00 AM Coffee Break
Chair(s):   Dean Klein, Micron Technology
Abstract:   Memory is a critical element of any computing system, but nowhere is it more critical than in the world of supercomputing. With large system power consumption and performance under the microscope designers are looking for new options for memory subsystem design. In this session we will look at upcoming evolutionary changes in the memory system architecture, more radical DRAM designs such as the Hybrid Memory Cube and the incorporation of new memory types into supercomputers in the form of NAND Flash memory.  
Presentations: New Waves in Memory Technology & System Hierarchy
9:00 AM - 9:30 AM
    Jaeheon (Jae) Jeong, Samsung Electronics
Scalable, Efficient, Resilient Memory Systems with the Hybrid Memory Cube
9:30 AM - 10:00 AM
    Todd Farrell, Micron Technology
Traversing Massive Graphs with NAND Flash
10:00 AM - 10:30 AM
    Roger Pearce, LLNL
Program may be subject to changes.